Re: [PATCH] clk: tegra: Fix wrong value written to PLLE_AUX

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On Fri, May 16, 2014 at 04:31:11PM +0200, Thierry Reding wrote:
> * PGP Signed by an unknown key
> 
> On Fri, May 16, 2014 at 04:50:20PM +0300, Tuomas Tynkkynen wrote:
> > The value written to PLLE_AUX was incorrect due to a wrong variable
> > being used.
> > 
> > Signed-off-by: Tuomas Tynkkynen <ttynkkynen@xxxxxxxxxx>
> > Tested-by: Mikko Perttunen <mperttunen@xxxxxxxxxx>
> > ---
> >   This fix is required for the (upcoming) SATA support.
> >  drivers/clk/tegra/clk-pll.c |    2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> Reviewed-by: Thierry Reding <treding@xxxxxxxxxx>
> Tested-by: Thierry Reding <treding@xxxxxxxxxx>
> Acked-by: Thierry Reding <treding@xxxxxxxxxx>
> 
> Mike, Peter, it might be good to have this go into 3.16 as a
> prerequisite for the upcoming SATA driver (which presumably won't be
> ready until 3.17, but in that case it would be good to have this
> prerequisite merged already).

Yes... We should also take Andrew's fixes. I will prepare a pull request for 3.16.

Cheers,

Peter.
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