On Tue, Apr 29, 2014 at 09:02:27AM +0900, Simon Horman wrote: > On Mon, Apr 28, 2014 at 08:30:32PM +0100, Russell King wrote: > > Since we now automatically enable early BRESP in core L2C-310 code when > > we detect a Cortex-A9, we don't need platforms/SoCs to set this bit > > explicitly. Instead, they should seek to preserve the value of bit 30 > > in the auxiliary control register. > > > > Acked-by: Tony Lindgren <tony@xxxxxxxxxxx> > > Signed-off-by: Russell King <rmk+kernel@xxxxxxxxxxxxxxxx> > > I would prefer if this patch was broken out into individual patches > for each board or SoC file and that they were then picked up > by their respective platform maintainers. > > Likewise for patch 66/97. Although it is only for shmobile > I would prefer it broken out. Oh fuck that. Okay, I'm dropping the whole patch set right now and forgetting the whole damned thing. The L2 cache code can damned well stay as it is and remain an unmaintainable mess. -- FTTC broadband for 0.8mile line: now at 9.7Mbps down 460kbps up... slowly improving, and getting towards what was expected from it. -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
