On 04/04/2014 07:55 AM, Thierry Reding wrote: > PLLE has M, N and P divider shift and width parameters that differ from > the defaults. Furthermore, when clearing the M, N and P divider fields > the corresponding masks were never shifted, thereby clearing only the > lowest bits of the register. This lead to a situation where the PLLE > programming would only work if the register hadn't been touched before. The series, Acked-by: Stephen Warren <swarren@xxxxxxxxxx> (I might have squashed patches 1 and 2 together, but no matter) I expect these patches should be CC: stable when applied? -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
