On Wed, Mar 26, 2014 at 1:24 PM, Ben Skeggs <skeggsb@xxxxxxxxx> wrote: > On Mon, Mar 24, 2014 at 6:42 PM, Alexandre Courbot <acourbot@xxxxxxxxxx> wrote: >> Add a GR device for GK20A based on NVE4, with the correct classes >> definitions (GK20A's 3D class is 0xa297). >> >> Most of the NVE4 code can be used on GK20A, so make relevant bits of >> NVE4 available to other chips as well. > This will need a bit of a rebase on top of the tree I mentioned > earlier (also queued for drm-next now), where I've further split out > and named the various chunks of state. Will do that. > > Does GK104 match entirely correctly, or just happen to work? I could > probably hunt down the GK20A netlist images and check that actually :) Do you mean, the init sequence? I haven't checked in detail (we are certainly doing things differently in the non-DRM driver), but the registers seem to match and the GPU is able to render after that. I admit I have not looked much further for now. The only register that does not exist on GK20A is 0x260, but when accessing it Nouveau will be able to continue unharmed after a memory fault. -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
