Re: [PATCH 01/10] ARM: tegra: Add AS3722 PMIC on Venice2

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On Friday 20 December 2013 03:55 PM, Thierry Reding wrote:
* PGP Signed by an unknown key

On Fri, Dec 20, 2013 at 12:23:28PM +0530, Laxman Dewangan wrote:
On Friday 20 December 2013 01:54 AM, Stephen Warren wrote:
On 12/19/2013 09:06 AM, Thierry Reding wrote:
(Laxman, as an aside, I'm not sure why you're upstreaming patches that
don't exactly match the existing kernel support for this board...)
I did not get this based on what context it is. Can you please elaborate
where I am missing the stuff?


diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
+				sd0 {
+					regulator-name = "vdd_cpu";
+					regulator-min-microvolt = <700000>;
+					regulator-max-microvolt = <1350000>;
Laxman's patch has:

  					regulator-max-microvolt = <1400000>;
We have the Laguna platform on which Android and L4T is running fine. This
is based on same PMIC used for Venice2. As we are running the more cpu
stress on Laguna, I took this parameter from the Laguna Power tree where it
is maximum 1.4V. Chrome have maximum as 1.35mV.
Whether this is used on Android, ChromeOS or L4T doesn't matter at all.
It specifies hardware constraints and thus must be agnostic of the OS
and workload.

Also this file describes the power tree for Venice2, so using values
from Laguna is wrong, no matter how similar they are.


Here, I used term "similar" means the which rail is feeding to Tegra's which vdd? So by this, if AMS SD0 is feeding to Tegra vdd-cpu then it should be same for Laguna. This is maximum possible for Tegra cpu from PMIC. Tegra can use desired voltage limited to this max based on their sku for going to maximum frequency. If we program less voltage as maximum then Tegra will not go to higher frequency assuming PMIC limitation which is not correct.




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