On Sun, Dec 01, 2013 at 12:21:17PM -0700, Stephen Warren wrote: > On 11/29/2013 08:22 AM, Thierry Reding wrote: > > On Wed, Nov 20, 2013 at 04:47:18PM -0700, Stephen Warren wrote: > >> From: Stephen Warren <swarren@xxxxxxxxxx> > >> > >> The blink clock rate needs to be configured, or it will run at > >> ~1Hz rather than the desired 32KHz. If it runs at the wrong rate, > >> e.g. the SDIO WiFi on Seaboard and Cardhu will fail to be > >> detected. > > > > How is this related to WiFi? > > The "blink" clock output from Tegra is connected to the WiFi module, > which then uses it for something; it probably has a PLL connected to > it that drives all the internal circuitry. Okay, thanks for explaining. Thierry
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