On 11/13/2013 11:15 AM, Stephen Warren wrote:
> On 11/12/2013 06:12 PM, Mark Zhang wrote:
>> On 11/13/2013 03:05 AM, Stephen Warren wrote:
>>> On 11/06/2013 10:32 PM, Mark Zhang wrote:
>>>> On Tegra114 it should be 0x12c.
>>>
>>>> diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
>>>
>>>> ahb: ahb {
>>>> compatible = "nvidia,tegra114-ahb", "nvidia,tegra30-ahb";
>>>> - reg = <0x6000c004 0x14c>;
>>>> + reg = <0x6000c004 0x12c>;
>>>> };
>>>
>>> I don't think this is correct.
>>>
>>> 0x12c /is/ the address of the last defined register that exists.
>>> However, the system memory map table in the TRM indicates that 336 bytes
>>> of address space are allocated for this module, so the value should be
>>> 0x150 (minus 4 due to the base address offset of 4, so 0x14c) for all of
>>> Tegra30/114/124. That matches what's already in DT.
>>>
>>
>> Yeah, but the 0x12c - 0x14c is not defined in TRM, despite the address
>> space in memory map is 336 bytes. So if you add this section into
>> register map, that implies writing into this section is OK but this is
>> undefined behaviour.
>
> I'm sure there are plenty of undefined register addresses in all the HW
> modules in Tegra.
>
Okay, if so I'm OK with that.
Mark
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