Re: [PATCHv3 05/19] ARM: dt: tegra114: iommu: Fix IOMMU register address

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Hiroshi Doyu <hdoyu@xxxxxxxxxx> wrote @ Thu, 31 Oct 2013 19:05:24 +0200 (EET):

> Hi Mark,
> 
> Mark Rutland <mark.rutland@xxxxxxx> wrote @ Thu, 31 Oct 2013 17:51:27 +0100:
> 
> > On Fri, Oct 18, 2013 at 11:26:46AM +0100, Hiroshi Doyu wrote:
> > > Fix IOMMU register address.
> > > 
> > > Signed-off-by: Hiroshi Doyu <hdoyu@xxxxxxxxxx>
> > > ---
> > >  arch/arm/boot/dts/tegra114.dtsi | 6 +++---
> > >  1 file changed, 3 insertions(+), 3 deletions(-)
> > > 
> > > diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
> > > index 2905145..8d42787 100644
> > > --- a/arch/arm/boot/dts/tegra114.dtsi
> > > +++ b/arch/arm/boot/dts/tegra114.dtsi
> > > @@ -318,9 +318,9 @@
> > >  
> > >  	iommu {
> > >  		compatible = "nvidia,tegra114-smmu", "nvidia,tegra30-smmu";
> > > -		reg = <0x7000f010 0x02c
> > > -		       0x7000f1f0 0x010
> > > -		       0x7000f228 0x074>;
> > > +		reg = <0x70019010 0x02c
> > > +		       0x700191f0 0x010
> > > +		       0x70019228 0x074>;
> > 
> > Minor cleanup/consistency request: as all these lines are changing anyway,
> > would you mind bracketing each entry individually:
> > 
> > 		reg = <0x70019010 0x02c>,
> > 		      <0x700191f0 0x010>,
> > 		      <0x70019228 0x074>;
> 
> No, at all. Attached the updated "[PATCHv3' 05/19]".

Oops, here's the right one, "[PATCHv3'' 05/19]".

From 156a6ad059f902590094570697cb33e5b892d835 Mon Sep 17 00:00:00 2001
From: Hiroshi Doyu <hdoyu@xxxxxxxxxx>
Date: Mon, 17 Jun 2013 15:37:35 +0300
Subject: [PATCHv3'' 1/1] ARM: dt: tegra114: iommu: Fix IOMMU register address

Fix IOMMU register address.

Signed-off-by: Hiroshi Doyu <hdoyu@xxxxxxxxxx>
---
 arch/arm/boot/dts/tegra114.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 2905145..e629042 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -318,9 +318,9 @@
 
 	iommu {
 		compatible = "nvidia,tegra114-smmu", "nvidia,tegra30-smmu";
-		reg = <0x7000f010 0x02c
-		       0x7000f1f0 0x010
-		       0x7000f228 0x074>;
+		reg = <0x70019010 0x02c>,
+		      <0x700191f0 0x010>,
+		      <0x70019228 0x074>;
 		nvidia,#asids = <4>;
 		dma-window = <0 0x40000000>;
 		nvidia,swgroups = <0x18659fe>;
-- 
1.8.1.5


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