On Wed, Oct 16, 2013 at 10:31:11AM +0800, Joseph Lo wrote: > On Wed, 2013-10-16 at 05:50 +0800, Stephen Warren wrote: > > On 10/15/2013 09:28 AM, Thierry Reding wrote: > > > Extend the list of power gates found on Tegra114. Note that there are > > > now holes in the list, so perhaps a simple array is no longer the best > > > data structure to represent it. But perhaps this is good enough for now > > > and can be cleaned up in a follow up patch? > > > > Peter should probably comment on this, since I think he's touched the > > powergate driver the most recently. > > > > One idea might be to have the powergate IDs be "virtual", with a > > virtual->HW ID mapping table per SoC. The virtual IDs need not have any > > gaps. I'm not sure that having gaps is really much of a problem though, > > except for the debugfs code in powergate.c... > > > > > diff --git a/include/linux/tegra-powergate.h b/include/linux/tegra-powergate.h > > > > > +#define TEGRA_POWERGATE_DISA 18 > > > +#define TEGRA_POWERGATE_DISB 19 > > > > s/DIS/DSI/ perhaps? > > > > > -#define TEGRA_POWERGATE_CPU0 TEGRA_POWERGATE_CPU > > > > I expect that was added deliberately. Perhaps Peter or Joseph can > > comment? Admittedly, it's not used right now. > > > > BTW, while you're fiddling with powergate.c, I note that > > mach-tegra/pmc.c #defines some TEGRA_POWERGATE_xxx rather than including > > tegra-powergate.h. Can you fix that? > > The reason why we didn't keep updated this code and use this driver is > because we want it to convert to use generic power domain > infrastructure[1]. Not sure this makes sense to you. (Only PCIe uses > this powergate driver until now.) We need it for gr3d as well and so far nobody's worked on the conversion to the power domain infrastructure as far as I know. So in the meantime we should still extend this driver to cover whatever functionality we need. Hopefully any effort we invest now can be reused when moving to the PM domain framework. Thierry
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