Re: [PATCH resend 1/2] clk: tegra: remove USB from clk init table

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On Monday 15 April 2013 11:17 PM, Stephen Warren wrote:
On 04/15/2013 01:31 AM, Lucas Stach wrote:
The USB clocks are just clock gates, so no need to set a specific clock.
In fact trying to set a specific clock is just a NOP if the requested
clockrate is the same as those of the parent (clk_m) or will trigger a
WARN_ON() if rates don't match up.

As we are not setting a specific rate, nor activating the clocks at
init, there is no point in keeping the the usb entries in the clock init
table.
Peter, Prashant, I'd like to confirm that the usb* clocks really do have
clk_m as their parent; we're sure they aren't driven by the 12MHz PLL_U
output?

Either way, I guess it's safe to take this patch since the clock would
be fixed rate; I'd just like to make sure the clock driver is accurate.

These are controller clocks and are not driven by PLL_U.


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