On 02.04.2013 08:47, Thierry Reding wrote: > On Tue, Apr 02, 2013 at 08:28:53AM +0300, Terje Bergström wrote: >> In Tegra20, 300MHz is the max rate we drive 2D in. Later Tegras have a >> higher max clock, and in Tegra114 we drive it from a different PLL. But >> for all of them 300MHz and PLLC should be a working configuration. I >> haven't checked how we use PLLC in upstream, so I'm not 100% sure. > > At least on Tegra30 (CardHu) I can see that the clocks are also children > of PLLC. I can add a similar hunk for Tegra30 to the patch. I have no Yes, Tegra30 is similar to Tegra20 in this respect. Only max clock is different, so similar hunk for Tegra30 would be a good idea. > Tegra114 hardware available and none of the downstream kernel branches I > have seem to include Tegra114 support either so I can't check what's in > use there, but if you say it should be fine I can include that in the > patch as well. I think it's better we add this when we have a patch that enables host1x driver for Tegra114 and we have tested. Until then, I suggest we just leave the Tegra114 part out. Terje -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
