Re: [PATCH] clk: tegra: set up audio clocks on Tegra114

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On 03/21/2013 01:45 PM, Stephen Warren wrote:
> From: Stephen Warren <swarren@xxxxxxxxxx>
> 
> This sets up all the audio-related clocks on Tegra114 in the same way
> as they are set up on previous chips.

> Peter, do you want to roll this into your CCF series V8, or should I apply
> it seperately?

I see that part of this is included in your CCF series v8, except that:

> diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c

> +	{pll_a, clk_max, 564480000, 1},
> +	{pll_a_out0, clk_max, 11289600, 1},
> +	{extern1, pll_a_out0, 0, 1},

> +	{clk_out_1, clk_max, 0, 1},

The "enable" bits are set to 0 there. As I mentioned in the other email,
the audio driver assumes these clocks are enabled, unless we want to
enhance the driver to change that, but that would create a dependency
between the ASoC and Tegra trees, which I'd really rather not do, since
other changes to the relevant ASoC files are already going through ASoC
tree for 3.10.

> +	{i2s0, pll_a_out0, 11289600, 0},
> +	{i2s1, pll_a_out0, 11289600, 0},
> +	{i2s2, pll_a_out0, 11289600, 0},
> +	{i2s3, pll_a_out0, 11289600, 0},
> +	{i2s4, pll_a_out0, 11289600, 0},

Those entries are missing. At least the parenting relationship needs to
be set up I believe.

I assume you want me to send an incremental patch to fix that up?
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