On 11/16/2012 03:35 PM, Thierry Reding wrote:
> On Fri, Nov 16, 2012 at 11:20:55PM +0100, Marc Dietrich wrote:
>> This adds host1x support which includes HDMI and LVDS support.
>> diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
>> b/arch/arm/boot/dts/tegra20-paz00.dts
>> - i2c@7000c000 { + lvds_ddc: i2c@7000c000 { status = "okay";
>> clock-frequency = <400000>;
>
> You might want to change this to 100 kHz as well. I think some
> displays don't like fast mode. Then again, if you've verified that
> this works on AC100 I suppose it can just as well stay as is.
>
> On a side-note, I've found that Tegra doesn't do proper 400 kHz
> either, but rather something like 375 kHz. Stephen, is this a known
> issue or is it actually supposed to be able to do exactly 400 kHz?
400KHz is the maximum clock per fast mode spec. The bus should work
anywhere down to 0Hz without issue. The fact we don't hit 400KHz is
most likely simply due to granularity of the clock divider for the I2C
block, combined with whatever rate the parent runs at.
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