Hi Thierry,
Thank you for your hard work.
The series,
Acked-by: Mark Zhang <markz@xxxxxxxxxx>
Reviewed-by: Mark Zhang <markz@xxxxxxxxxx>
Tested-by: Mark Zhang <markz@xxxxxxxxxx>
On Ventana, LVDS and HDMI worked.
PS: Alex's power sequence patch is needed to enable panel and backlight.
Also we need to define dc and hdmi nodes in tegra20-ventana.dts.
We may publish the patches for different boards next.
Mark
On 11/16/2012 05:07 AM, Thierry Reding wrote:
> This second version of this patch series splits the patches up into more
> logical chunks as requested by Stephen. Instead of renaming the matching
> parameters in the clock driver, this version renames the AUXDATA entries
> to match what the clock driver expects. Furthermore the host1x clock is
> initialized to 150 MHz instead of the unsupported 144 MHz.
>
> Thierry
>
> Thierry Reding (6):
> ARM: tegra: Add Tegra20 host1x support
> ARM: tegra: Add AUXDATA for Tegra20 host1x
> ARM: tegra: Add Tegra20 host1x clock support
> ARM: tegra: Add Tegra30 host1x support
> ARM: tegra: Add AUXDATA for Tegra30 host1x
> ARM: tegra: Add Tegra30 host1x clock support
>
> arch/arm/boot/dts/tegra20.dtsi | 87 +++++++++++++++++++++++++++++++
> arch/arm/boot/dts/tegra30.dtsi | 87 +++++++++++++++++++++++++++++++
> arch/arm/mach-tegra/board-dt-tegra20.c | 9 ++++
> arch/arm/mach-tegra/board-dt-tegra30.c | 9 ++++
> arch/arm/mach-tegra/tegra20_clocks_data.c | 11 ++--
> arch/arm/mach-tegra/tegra30_clocks_data.c | 5 +-
> 6 files changed, 203 insertions(+), 5 deletions(-)
>
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