On Mon, 2012-10-22 at 12:38 +0800, Prashant Gaikwad wrote:
> On Friday 19 October 2012 12:08 PM, Joseph Lo wrote:
> > Adding the AHB and APB bus clock control interface for Tegra30.
> >
> > Signed-off-by: Joseph Lo<josephl@xxxxxxxxxx>
> > ---
> > arch/arm/mach-tegra/common.c | 4 +
> > arch/arm/mach-tegra/tegra30_clocks.c | 106 +++++++++++++++++++++++++++++
> > arch/arm/mach-tegra/tegra30_clocks.h | 1 +
> > arch/arm/mach-tegra/tegra30_clocks_data.c | 46 +++++++++++++
> > 4 files changed, 157 insertions(+), 0 deletions(-)
>
> <snip>
>
> > +
> > +static long tegra30_bus_clk_round_rate(struct clk_hw *hw, unsigned long rate,
> > + unsigned long *prate)
> > +{
> > + unsigned long parent_rate = *prate;
> > + s64 divider;
> > +
> > + if (rate>= parent_rate)
> > + return rate;
> > +
>
> return parent_rate?
Prashant,
Yes, thanks.
>
> > + divider = parent_rate;
> > + divider += rate - 1;
> > + do_div(divider, rate);
> > +
> > + if (divider< 0)
> > + return divider;
> > +
> > + if (divider> 4)
> > + divider = 4;
> > + do_div(parent_rate, divider);
> > +
> > + return parent_rate;
> > +}
> >
>
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