On Tue, Apr 24, 2012 at 03:05:14PM +0300, Hiroshi DOYU wrote: > The AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced > High-performance Bus (AHB) architecture. > > The AHB Arbiter controls AHB bus master arbitration. This effectively > forms a second level of arbitration for access to the memory > controller through the AHB Slave Memory device. The AHB pre-fetch > logic can be configured to enhance performance for devices doing > sequential access. Each AHB master is assigned to either the high or > low priority bin. Both Tegra20/30 have this AHB bus. > > Signed-off-by: Hiroshi DOYU <hdoyu@xxxxxxxxxx> > Cc: Felipe Balbi <balbi@xxxxxx> > Cc: Arnd Bergmann <arnd@xxxxxxxx> > --- > Update: > - Use platform_device to get info from dt dynamically.(Felipe/Arnd) > --- > arch/arm/mach-tegra/Makefile | 1 + > arch/arm/mach-tegra/tegra-ahb.c | 285 +++++++++++++++++++++++++++++++++++++++ > 2 files changed, 286 insertions(+), 0 deletions(-) 1. I thought we weren't going to have any more drivers under arch/arm 2. From the way you describe it above, this sounds like it should be some kind of generic driver, which obtains the necessary settings to be programmed into registers from (eg) DT. -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
