* Rob Herring wrote: > There is a whole bunch of PCI DT code sitting in the powerpc tree that > probably needs to be moved to common location and used here. > > This looks way too simple to be what's needed if I compare to PCI > bindings in powerpc dts files. My particular setup may be much simpler than the average PowerPC machine. The patchset is only what I need to get PCIe running on the platform, which has an FPGA connected to the Tegra via PCIe. For instance there is no legacy interrupt support (only MSI), so interrupt remapping is not required. I also know that OF nodes are not properly hooked up with the PCI devices yet, which I will need, among other things, to provide platform data for an SPI flash connected to an SPI master implemented within the FPGA. I also haven't looked at specifying the memory ranges via the device tree. So quite a lot may still be missing, but does that prevent any of this from being added to mainline? Things can be added on an as-needed basis, can't they? Thierry
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