Hi,
On Tue, Mar 6, 2012 at 9:45 AM, Dmitry Artamonow <mad_soft@xxxxxxxx> wrote:
> Tegra PCIe driver waits for PLL to lock using busy loop.
> If PLL fails to lock for some reason, this leads to silent lockup
> while booting (as PCIe code is not modular).
>
> Fix by adding timeout, so if PLL doesn't lock in a couple
> of seconds, just PCIe driver fails and machine continues to boot.
>
> Signed-off-by: Dmitry Artamonow <mad_soft@xxxxxxxx>
> ---
> arch/arm/mach-tegra/pcie.c | 14 +++++++++++---
> 1 files changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
> index 14b29ab..ffdfdd4 100644
> --- a/arch/arm/mach-tegra/pcie.c
> +++ b/arch/arm/mach-tegra/pcie.c
> @@ -585,10 +585,10 @@ static void tegra_pcie_setup_translations(void)
> afi_writel(0, AFI_MSI_BAR_SZ);
> }
>
> -static void tegra_pcie_enable_controller(void)
> +static int tegra_pcie_enable_controller(void)
> {
> u32 val, reg;
> - int i;
> + int i, timeout;
>
> /* Enable slot clock and pulse the reset signals */
> for (i = 0, reg = AFI_PEX0_CTRL; i < 2; i++, reg += 0x8) {
> @@ -639,8 +639,14 @@ static void tegra_pcie_enable_controller(void)
> pads_writel(0xfa5cfa5c, 0xc8);
>
> /* Wait for the PLL to lock */
> + timeout = 2000;
> do {
> val = pads_readl(PADS_PLL_CTL);
> + mdelay(1);
why are you using an mdelay? If you need to sleep 1ms just use
usleep_range or similar
Andi
> + if (--timeout == 0) {
> + pr_err("Tegra PCIe error: timeout waiting for PLL\n");
> + return -EBUSY;
> + }
> } while (!(val & PADS_PLL_CTL_LOCKDET));
>
> /* turn off IDDQ override */
> @@ -921,7 +927,9 @@ int __init tegra_pcie_init(bool init_port0, bool init_port1)
> if (err)
> return err;
>
> - tegra_pcie_enable_controller();
> + err = tegra_pcie_enable_controller();
> + if (err)
> + return err;
>
> /* setup the AFI address translations */
> tegra_pcie_setup_translations();
> --
> 1.7.5.1.300.gc565c
>
> --
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