* Mike Rapoport <mike.rapoport@xxxxxxxxx> [110507 12:03]: > On Wed, May 4, 2011 at 12:22 PM, Tony Lindgren <tony@xxxxxxxxxxx> wrote: > > * Colin Cross <ccross@xxxxxxxxxx> [110502 14:26]: > >> On Mon, May 2, 2011 at 1:52 PM, Stephen Warren <swarren@xxxxxxxxxx> wrote: > >> > >> * Drive strength is also controlled through groups of pins, but > >> different groups than pinmux. ÂMost of the drive strength groups are > >> collections of pad mux groups, but there are a few pins that are in > >> the same pad mux group but a different drive strength group. > >> * Setting a pin as a GPIO overrides its group's mux setting, except > >> for the group's tristate. ÂYou must untristate the entire group to use > >> a single pin as a GPIO. > >> * Each group has a "safe mode", but which mux id to select to enter > >> the safe mode is completely random. > > > > Just posted something in this thread regarding using standard data and > > standard read and write functions, then allow setting platform specific > > custom flags as needed. Care to see if that works for you too? > > Tegra does not allow pin muxing on the pin by pin basis. And, > registers that define mux config differ from those that define flags > (pull, driver strength, safe mode etc). Hmm well the separate config register could be added easily. But the grouping of pins might be tricky then :) Tony -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
