Re: [PATCH] ARM: tegra: pll_a clock fixes

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On Tue, Jan 4, 2011 at 4:47 PM, Stephen Warren <swarren@xxxxxxxxxxxxx> wrote:
> From: Stephen Warren <swarren@xxxxxxxxxx>
>
> Remove pll_a table entries for frequencies that pll_a can't generate itself
> (the pll_a_out0 divider is required for those frequencies with the pll
> configuration in those table entries). Clock driver clients should be fixed
> to request the actual pll_a frequency desired. No current in-tree drivers
> are affected by this change.
>
> Increase the max_frequency entries for clocks that can be driven from pll_a
> to match the fastest pll_a table entry.
>
> Signed-off-by: Stephen Warren <swarren@xxxxxxxxxx>
> ---
> This is for for-next.
>
>  arch/arm/mach-tegra/tegra2_clocks.c |    8 +++-----
>  1 files changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
> index ef46313..10e25fa 100644
> --- a/arch/arm/mach-tegra/tegra2_clocks.c
> +++ b/arch/arm/mach-tegra/tegra2_clocks.c
> @@ -1194,8 +1194,6 @@ static struct clk tegra_pll_p_out4 = {
>  static struct clk_pll_table tegra_pll_a_table[] = {
>        { 28800000, 56448000, 49, 25, 1, 1},
>        { 28800000, 73728000, 64, 25, 1, 1},
> -       { 28800000, 11289600, 49, 25, 1, 1},
> -       { 28800000, 12288000, 64, 25, 1, 1},
>        { 28800000, 24000000,  5,  6, 1, 1},
>        { 0, 0, 0, 0, 0, 0 },
>  };
> @@ -1213,7 +1211,7 @@ static struct clk tegra_pll_a = {
>        .vco_min   = 20000000,
>        .vco_max   = 1400000000,
>        .pll_table = tegra_pll_a_table,
> -       .max_rate  = 56448000,
> +       .max_rate  = 73728000,
>  };
>
>  static struct clk tegra_pll_a_out0 = {
> @@ -1223,7 +1221,7 @@ static struct clk tegra_pll_a_out0 = {
>        .parent    = &tegra_pll_a,
>        .reg       = 0xb4,
>        .reg_shift = 0,
> -       .max_rate  = 56448000,
> +       .max_rate  = 73728000,
>  };
>
>  static struct clk_pll_table tegra_pll_d_table[] = {
> @@ -1395,7 +1393,7 @@ static struct clk tegra_clk_audio = {
>        .name      = "audio",
>        .inputs    = mux_audio_sync_clk,
>        .reg       = 0x38,
> -       .max_rate  = 24000000,
> +       .max_rate  = 73728000,
>        .ops       = &tegra_audio_sync_clk_ops
>  };
>
> --
> 1.7.0.4

The frequency table changes are already in linux-tegra-2.6.36.  I
applied just the max_rate changes to linux-tegra-2.6.36, they'll go to
for-next as part of the next clock changes.
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