On Fri, Nov 19, 2010 at 9:07 AM, Stephen Warren <swarren@xxxxxxxxxx> wrote:
> Signed-off-by: Stephen Warren <swarren@xxxxxxxxxx>
> ---
> arch/arm/mach-tegra/dma.c | 12 ++++++++++++
> arch/arm/mach-tegra/tegra2_clocks.c | 6 ++++++
> 2 files changed, 18 insertions(+), 0 deletions(-)
> mode change 100644 => 100755 arch/arm/mach-tegra/dma.c
>
> diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c
> old mode 100644
> new mode 100755
> index 97335c0..a06edbb
> --- a/arch/arm/mach-tegra/dma.c
> +++ b/arch/arm/mach-tegra/dma.c
> @@ -27,10 +27,12 @@
> #include <linux/err.h>
> #include <linux/irq.h>
> #include <linux/delay.h>
> +#include <linux/clk.h>
> #include <mach/dma.h>
> #include <mach/irqs.h>
> #include <mach/iomap.h>
> #include <mach/suspend.h>
> +#include "clock.h"
clock.h is private to the clock implementation, don't include it here.
> #define APB_DMA_GEN 0x000
> #define GEN_ENABLE (1<<31)
> @@ -773,6 +775,16 @@ int __init tegra_dma_init(void)
> int i;
> unsigned int irq;
> void __iomem *addr;
> + struct clk *c;
> +
> + c = tegra_get_clock_by_name("apbdma");
tegra_get_clock_by_name is private to the clock implementation, it
should not be used outside clock.c and tegra2_clocks.c. Use
clk_get_sys. Also, after a recent change in the Tegra tree, DMA is
initialized before clocks, and this introduces a dependency loop:
Reading fuses requires dma (hw bug), dma requires clocks, and clocks
has to read the fuses to determine how fast the cpu can go. I'll have
to fix that in the fuse API.
> + if (c) {
> + ret = clk_enable(c);
> + if (ret != 0) {
> + pr_err("Unable to enable clock for APB DMA\n");
> + goto fail;
> + }
> + }
>
> addr = IO_ADDRESS(TEGRA_APB_DMA_BASE);
> writel(GEN_ENABLE, addr + APB_DMA_GEN);
> diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
> index dec27b7..a7fa579 100644
> --- a/arch/arm/mach-tegra/tegra2_clocks.c
> +++ b/arch/arm/mach-tegra/tegra2_clocks.c
> @@ -1845,6 +1845,11 @@ static struct clk_mux_sel mux_clk_32k[] = {
> { 0, 0},
> };
>
> +static struct clk_mux_sel mux_pclk[] = {
> + { .input = &tegra_clk_pclk, .value = 0},
> + { 0, 0},
> +};
> +
> #define PERIPH_CLK(_name, _dev, _con, _clk_num, _reg, _max, _inputs, _flags) \
> { \
> .name = _name, \
> @@ -1874,6 +1879,7 @@ static struct clk_mux_sel mux_clk_32k[] = {
> }
>
> struct clk tegra_list_clks[] = {
> + PERIPH_CLK("apbdma", "tegra-dma", NULL, 34, 0, 108000000, mux_pclk, 0),
> PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET),
> PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0),
> PERIPH_CLK("i2s1", "i2s.0", NULL, 11, 0x100, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71),
> --
> 1.7.0.4
>
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