Join constants MACPHY_Array_PGLength with MACPHY_Array_PGLengthPciE to
RTL8192E_MACPHY_ARR_PG_LEN to improve readability.
Signed-off-by: Philipp Hortmann <philipp.g.hortmann@xxxxxxxxx>
---
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c | 2 +-
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h | 1 -
drivers/staging/rtl8192e/rtl8192e/table.h | 4 ++--
3 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
index e42b77f91528..86d51eb7af17 100644
--- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
@@ -287,7 +287,7 @@ void rtl92e_config_mac(struct net_device *dev)
struct r8192_priv *priv = rtllib_priv(dev);
if (priv->tx_pwr_data_read_from_eeprom) {
- dwArrayLen = MACPHY_Array_PGLength;
+ dwArrayLen = RTL8192E_MACPHY_ARR_PG_LEN;
pdwArray = Rtl819XMACPHY_Array_PG;
} else {
diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
index e9ff224953f9..73a532b96777 100644
--- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
@@ -9,7 +9,6 @@
#define MAX_DOZE_WAITING_TIMES_9x 64
-#define MACPHY_Array_PGLength MACPHY_Array_PGLengthPciE
#define PHY_REG_1T2RArrayLength PHY_REG_1T2RArrayLengthPciE
#define Rtl819XMACPHY_Array_PG Rtl8192PciEMACPHY_Array_PG
diff --git a/drivers/staging/rtl8192e/rtl8192e/table.h b/drivers/staging/rtl8192e/rtl8192e/table.h
index 174a4dfb1855..70c31d56ea14 100644
--- a/drivers/staging/rtl8192e/rtl8192e/table.h
+++ b/drivers/staging/rtl8192e/rtl8192e/table.h
@@ -19,8 +19,8 @@ extern u32 Rtl8192PciERadioA_Array[RTL8192E_RADIO_A_ARR_LEN];
extern u32 Rtl8192PciERadioB_Array[RTL8192E_RADIO_B_ARR_LEN];
#define RTL8192E_MACPHY_ARR_LEN 18
extern u32 Rtl8192PciEMACPHY_Array[RTL8192E_MACPHY_ARR_LEN];
-#define MACPHY_Array_PGLengthPciE 30
-extern u32 Rtl8192PciEMACPHY_Array_PG[MACPHY_Array_PGLengthPciE];
+#define RTL8192E_MACPHY_ARR_PG_LEN 30
+extern u32 Rtl8192PciEMACPHY_Array_PG[RTL8192E_MACPHY_ARR_PG_LEN];
#define RTL8192E_AGCTAB_ARR_LEN 384
extern u32 Rtl8192PciEAGCTAB_Array[RTL8192E_AGCTAB_ARR_LEN];
--
2.39.2
