Remove unused priv->phy_reg_def[RF90_PATH_C].rfintfo and priv->phy_reg_def[RF90_PATH_D].rfintfo and remove unused priv->phy_reg_def[RF90_PATH_C].rfintfe and priv->phy_reg_def[RF90_PATH_D].rfintfe. The termination condition for the loop is set to priv->num_total_rf_path = RTL819X_TOTAL_RF_PATH = 2. Because of this pPhyReg = &priv->phy_reg_def[eRFPath]; pPhyReg cannot point to array element 2 for RF90_PATH_C and 3 for RF90_PATH_D. Remove unused constants as well. Signed-off-by: Philipp Hortmann <philipp.g.hortmann@xxxxxxxxx> --- drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c | 4 ---- drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h | 2 -- 2 files changed, 6 deletions(-) diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c index 19fdf56e5e91..a0dd628b1bf5 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c @@ -361,13 +361,9 @@ static void _rtl92e_init_bb_rf_reg_def(struct net_device *dev) priv->phy_reg_def[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; priv->phy_reg_def[RF90_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; - priv->phy_reg_def[RF90_PATH_C].rfintfo = rFPGA0_XC_RFInterfaceOE; - priv->phy_reg_def[RF90_PATH_D].rfintfo = rFPGA0_XD_RFInterfaceOE; priv->phy_reg_def[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; priv->phy_reg_def[RF90_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; - priv->phy_reg_def[RF90_PATH_C].rfintfe = rFPGA0_XC_RFInterfaceOE; - priv->phy_reg_def[RF90_PATH_D].rfintfe = rFPGA0_XD_RFInterfaceOE; priv->phy_reg_def[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; priv->phy_reg_def[RF90_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h index 5a47b232945f..ec39de9e89fe 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h @@ -66,8 +66,6 @@ #define rFPGA0_XCD_SwitchControl 0x85c #define rFPGA0_XA_RFInterfaceOE 0x860 #define rFPGA0_XB_RFInterfaceOE 0x864 -#define rFPGA0_XC_RFInterfaceOE 0x868 -#define rFPGA0_XD_RFInterfaceOE 0x86c #define rFPGA0_XAB_RFInterfaceSW 0x870 #define rFPGA0_XAB_RFParameter 0x878 #define rFPGA0_XCD_RFParameter 0x87c -- 2.39.2
