[PATCH 3/3] staging: rtl8192e: Rename WAIotTHVal, RegC38_TH

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Rename macros: WAIotTHVal to WA_IOT_TH_VAL and
RegC38_TH to REG_38_TH to avoid CamelCase which is not accepted
by checkpatch.

Signed-off-by: Dragan Cvetic <dragan.m.cvetic@xxxxxxxxx>
---
 drivers/staging/rtl8192e/rtl8192e/rtl_dm.c | 6 +++---
 drivers/staging/rtl8192e/rtl8192e/rtl_dm.h | 4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c
index c7ce1cab619d..f4f7820ad35d 100644
--- a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c
@@ -1651,7 +1651,7 @@ static void _rtl92e_dm_init_wa_broadcom_iot(struct net_device *dev)
 	struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
 
 	pHTInfo->bWAIotBroadcom = false;
-	pHTInfo->WAIotTH = WAIotTHVal;
+	pHTInfo->WAIotTH = WA_IOT_TH_VAL;
 }
 
 static void _rtl92e_dm_check_rf_ctrl_gpio(void *data)
@@ -2221,7 +2221,7 @@ static void _rtl92e_dm_check_fsync(struct net_device *dev)
 		if (priv->framesyncMonitor) {
 			if (priv->rtllib->state == RTLLIB_LINKED) {
 				if (priv->undecorated_smoothed_pwdb <=
-				    RegC38_TH) {
+				    REG_C38_TH) {
 					if (reg_c38_State !=
 					    RegC38_NonFsync_Other_AP) {
 						rtl92e_writeb(dev,
@@ -2232,7 +2232,7 @@ static void _rtl92e_dm_check_fsync(struct net_device *dev)
 						     RegC38_NonFsync_Other_AP;
 					}
 				} else if (priv->undecorated_smoothed_pwdb >=
-					   (RegC38_TH+5)) {
+					   (REG_C38_TH + 5)) {
 					if (reg_c38_State) {
 						rtl92e_writeb(dev,
 							rOFDM0_RxDetector3,
diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h
index a643ff5ad597..9fadb1ea231c 100644
--- a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h
@@ -34,7 +34,7 @@
 #define		RATE_ADAPTIVE_TH_LOW_40M		10
 #define		VERI_LOW_RSSI				15
 
-#define		WAIotTHVal						25
+#define		WA_IOT_TH_VAL				25
 
 #define		E_FOR_TX_POWER_TRACK	       300
 #define		TX_POWER_NEAR_FIELD_THRESH_HIGH		68
@@ -45,7 +45,7 @@
 #define		CURRENT_TX_RATE_REG		0x1e0
 #define		INITIAL_TX_RATE_REG		0x1e1
 #define		TX_RETRY_COUNT_REG		0x1ac
-#define		RegC38_TH				 20
+#define		REG_C38_TH				20
 
 #define		DM_Type_ByDriver		1
 
-- 
2.25.1





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