[PATCH] clocking-wizard: fix a schedule during spin lock acquisition

[Hao Peng <flyingpenghao@xxxxxxxxx>]

From: Peng Hao <flyingpeng@xxxxxxxxxxx>

when the interrupt is disabled and the spin lock is acquired,
calling read_poll_timeout will trigger the schedule, which should
be replaced by read_poll_timeout_atomic.

Signed-off-by: Peng Hao <flyingpeng@xxxxxxxxxxx>
---
 drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c
b/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c
index 39367712ef54..986af03b31c9 100644
--- a/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c
+++ b/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c
@@ -157,7 +157,7 @@ static int clk_wzrd_dynamic_reconfig(struct clk_hw
*hw, unsigned long rate,
        writel(0x00, div_addr + WZRD_DR_DIV_TO_PHASE_OFFSET);

        /* Check status register */
-       err = readl_poll_timeout(divider->base + WZRD_DR_STATUS_REG_OFFSET,
+       err = readl_poll_timeout_atomic(divider->base +
WZRD_DR_STATUS_REG_OFFSET,
                                       value, value & WZRD_DR_LOCK_BIT_MASK,
                                       WZRD_USEC_POLL, WZRD_TIMEOUT_POLL);
        if (err)
@@ -168,7 +168,7 @@ static int clk_wzrd_dynamic_reconfig(struct clk_hw
*hw, unsigned long rate,
               divider->base + WZRD_DR_INIT_REG_OFFSET);

        /* Check status register */
-       err = readl_poll_timeout(divider->base + WZRD_DR_STATUS_REG_OFFSET,
+       err = readl_poll_timeout_atomic(divider->base +
WZRD_DR_STATUS_REG_OFFSET,
                                       value, value & WZRD_DR_LOCK_BIT_MASK,
                                       WZRD_USEC_POLL, WZRD_TIMEOUT_POLL);
 err_reconfig:
--
2.27.0