Hi Greg, On Thu, 31 Mar 2022 at 20:32, Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> wrote: > > + Until we can test and resolve any issues on final silicon (due 2H 2021) > > + this driver should remain in staging. > > Then why not just wait? Why merge this now? What is the benifit of us > taking this code at this point in time for hardware that is no one has > as it is not even created? FWIW there is an SoC that is supported (if console from initramfs on uart counts..) in mainline, Sigmastar ssd202d, that has this IP so it exists in the wild. I have tried to get this driver running on it and it did something but didn't get far enough to actually decode video. Cheers, Daniel
