Hi Jacopo,
Thank you for the patch.
On Mon, Feb 14, 2022 at 07:43:16PM +0100, Jacopo Mondi wrote:
> Bits 13 and 12 of the ISP_CONFIGn register configure the PIXEL_MODE
> which specifies the sampling size, in pixel component units, on the
> CSI-2 output data interface when data are transferred to memory.
>
> The register description in the chip manual specifies that DUAL mode
> should be used for YUV422 data but does not clarify the reason.
>
> Verify if other YUV formats require the same setting and what is the
> appropriate setting for RAW and sRGB formats.
If it's an action item, shouldn't it be in a TODO comment in the code
instead ?
While it shouldn't be difficult to test this in RAW8 mode, I'd leave it
for later, as I don't want to get into the rabbit hole of adding
S[RGB]{4}8_0_5X16 or S[RGB]{4}10_0_5X20 formats now :-)
> Signed-off-by: Jacopo Mondi <jacopo@xxxxxxxxxx>
> Signed-off-by: Xavier Roumegue <xavier.roumegue@xxxxxxxxxxx>
> ---
> drivers/media/platform/imx/imx-mipi-csis.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/media/platform/imx/imx-mipi-csis.c b/drivers/media/platform/imx/imx-mipi-csis.c
> index f433758c8935..98a7538a6ce3 100644
> --- a/drivers/media/platform/imx/imx-mipi-csis.c
> +++ b/drivers/media/platform/imx/imx-mipi-csis.c
> @@ -173,6 +173,7 @@
> #define MIPI_CSIS_ISPCFG_PIXEL_MODE_SINGLE (0 << 12)
> #define MIPI_CSIS_ISPCFG_PIXEL_MODE_DUAL (1 << 12)
> #define MIPI_CSIS_ISPCFG_PIXEL_MODE_QUAD (2 << 12) /* i.MX8M[MNP] only */
> +#define MIPI_CSIS_ISPCFG_PIXEL_MASK (3 << 12)
> #define MIPI_CSIS_ISPCFG_ALIGN_32BIT BIT(11)
> #define MIPI_CSIS_ISPCFG_FMT(fmt) ((fmt) << 2)
> #define MIPI_CSIS_ISPCFG_FMT_MASK (0x3f << 2)
> @@ -506,7 +507,12 @@ static void __mipi_csis_set_format(struct csi_state *state)
>
> /* Color format */
> val = mipi_csis_read(state, MIPI_CSIS_ISP_CONFIG_CH(0));
> - val &= ~(MIPI_CSIS_ISPCFG_ALIGN_32BIT | MIPI_CSIS_ISPCFG_FMT_MASK);
> + val &= ~(MIPI_CSIS_ISPCFG_ALIGN_32BIT | MIPI_CSIS_ISPCFG_FMT_MASK
> + | MIPI_CSIS_ISPCFG_PIXEL_MASK);
> +
> + if (state->csis_fmt->data_type == MIPI_CSI2_DATA_TYPE_YUV422_8)
> + val |= MIPI_CSIS_ISPCFG_PIXEL_MODE_DUAL;
> +
> val |= MIPI_CSIS_ISPCFG_FMT(state->csis_fmt->data_type);
> mipi_csis_write(state, MIPI_CSIS_ISP_CONFIG_CH(0), val);
>
--
Regards,
Laurent Pinchart
