---
arch/arm64/boot/dts/freescale/Makefile | 4 +
.../imx8mm-tqma8mqml-mba8mx-imx327.dts | 95 +++++++++++++++++++
2 files changed, 99 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx-imx327.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 852615febf9a..5ef8ff05452e 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -57,6 +57,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-edimm2.2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-n801x-s.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx.dtb
+
+tqma8mqml-mba8mx-imx327-dtbs += imx8mm-tqma8mqml-mba8mx.dtb imx8mm-tqma8mqml-mba8mx-imx327.dtbo
+dtb-$(CONFIG_ARCH_MXC) += tqma8mqml-mba8mx-imx327.dtb
+
dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx-imx327.dts b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx-imx327.dts
new file mode 100644
index 000000000000..3f1223d4d73b
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx-imx327.dts
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright 2021 TQ-Systems GmbH
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+
+/dts-v1/;
+/plugin/;
+
+&{/} {
+ compatible = "tq,imx8mm-tqma8mqml-mba8mx", "tq,imx8mm-tqma8mqml", "fsl,imx8mm";
+
+ sensor_clk: sensor-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <37125000>;
+ };
+};
+
+&csi {
+ status = "okay";
+};
+
+&i2c3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vc_fpga: fpga@10 {
+ reg = <0x10>;
+ compatible = "vc,fpga";
+
+ vc_fpga_reg: regulator {
+ regulator-name = "CAM_VCC";
+ };
+
+ vc_fpga_reset: reset {
+ #reset-cells = <0>;
+ };
+
+ vc_fpga_gpio: gpio-chip {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ sony_imx327: camera@1a {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ reg = <0x1a>;
+
+ compatible = "sony,imx327", "sony,imx290";
+
+ clock-names = "xclk";
+ clocks = <&sensor_clk>;
+ clock-frequency = <37125000>;
+
+ vdd-supply = <&vc_fpga_reg>;
+
+ vdda-supply = <&vc_fpga_reg>;
+ vddd-supply = <&vc_fpga_reg>;
+ vdddo-supply = <&vc_fpga_reg>;
+
+ reset-gpios = <&vc_fpga_gpio 0 GPIO_ACTIVE_HIGH>;
+
+ port@0 {
+ reg = <0>;
+
+ sony_imx327_ep0: endpoint {
+ remote-endpoint = <&imx8mm_mipi_csi_in>;
+ data-lanes = <1 2>;
+ clock-lanes = <0>;
+ clock-noncontinuous = <1>;
+ link-frequencies = /bits/ 64 <445500000 297000000>;
+ };
+ };
+ };
+};
+
+&mipi_csi {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ imx8mm_mipi_csi_in: endpoint {
+ remote-endpoint = <&sony_imx327_ep0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+};
\ No newline at end of file
--
2.25.1
