Quoting Sergio Paracuellos (2022-01-10 03:49:29) > MT7621 system controller node is already providing the clocks for the whole > system but must also serve as a reset provider. Hence, add reset controller > related code to the clock driver itself. To get resets properly ready for > the rest of the world we need to move platform driver initialization process > to 'arch_initcall'. > > CC: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx> > Signed-off-by: Sergio Paracuellos <sergio.paracuellos@xxxxxxxxx> > --- > drivers/clk/ralink/clk-mt7621.c | 92 ++++++++++++++++++++++++++++++++- > 1 file changed, 91 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/ralink/clk-mt7621.c b/drivers/clk/ralink/clk-mt7621.c > index a2c045390f00..99256659dd96 100644 > --- a/drivers/clk/ralink/clk-mt7621.c > +++ b/drivers/clk/ralink/clk-mt7621.c > @@ -11,14 +11,17 @@ > #include <linux/mfd/syscon.h> > #include <linux/platform_device.h> > #include <linux/regmap.h> > +#include <linux/reset-controller.h> > #include <linux/slab.h> > #include <dt-bindings/clock/mt7621-clk.h> > +#include <dt-bindings/reset/mt7621-reset.h> I can't take this patch without taking the first patch. I suppose if Greg is OK I can take the staging patch #4 through clk tree too? Let me know.
