On Mon, Dec 06, 2021 at 07:54:42PM -0600, Adam Ford wrote:
> From: Benjamin Gaignard <benjamin.gaignard@xxxxxxxxxxxxx>
>
> Introducing the G2 hevc video decoder requires modifications of the bindings to allow
> one node per VPU.
Why? It looks like the G2 part was already described. If you are
changing this because you want 2 drivers for G1 and G2, then NAK. DT
nodes and drivers don't have to be 1:1. This change is breaking
compatibility.
>
> VPUs share one hardware control block which is provided as a phandle on
> a syscon.
That's not really ideal. Is this really a separate block?
> Each node has now one reg and one interrupt.
> Add a compatible for G2 hardware block: nxp,imx8mq-vpu-g2.
>
> To be compatible with older DT the driver is still capable to use the 'ctrl'
> reg-name even if it is deprecated now.
>
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@xxxxxxxxxxxxx>
> Signed-off-by: Adam Ford <aford173@xxxxxxxxx>
>
> diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> index 762be3f96ce9..eaeba4ce262a 100644
> --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> @@ -15,37 +15,36 @@ description:
>
> properties:
> compatible:
> - const: nxp,imx8mq-vpu
> + oneOf:
> + - const: nxp,imx8mq-vpu-g1
> + - const: nxp,imx8mq-vpu-g2
>
> reg:
> - maxItems: 3
> -
> - reg-names:
> - items:
> - - const: g1
> - - const: g2
> - - const: ctrl
> + maxItems: 1
>
> interrupts:
> - maxItems: 2
> + maxItems: 1
>
> interrupt-names:
> - items:
> + oneOf:
> - const: g1
> - const: g2
>
> clocks:
> - maxItems: 3
> + maxItems: 1
>
> clock-names:
> - items:
> + oneOf:
> - const: g1
> - const: g2
> - - const: bus
>
> power-domains:
> maxItems: 1
>
> + nxp,imx8m-vpu-ctrl:
> + description: Specifies a phandle to syscon VPU hardware control block
> + $ref: "/schemas/types.yaml#/definitions/phandle"
This is optional?
> +
> required:
> - compatible
> - reg
> @@ -60,20 +59,27 @@ additionalProperties: false
> examples:
> - |
> #include <dt-bindings/clock/imx8mq-clock.h>
> + #include <dt-bindings/power/imx8mq-power.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
>
> - vpu: video-codec@38300000 {
> + vpu_g1: video-codec@38300000 {
> compatible = "nxp,imx8mq-vpu";
> - reg = <0x38300000 0x10000>,
> - <0x38310000 0x10000>,
> - <0x38320000 0x10000>;
> - reg-names = "g1", "g2", "ctrl";
> - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "g1", "g2";
> - clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
> - <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
> - <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
> - clock-names = "g1", "g2", "bus";
> - power-domains = <&pgc_vpu>;
> + reg = <0x38300000 0x10000>;
> + reg-names "g1";
> + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "g1";
> + clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
> + clock-names = "g1";
> + power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G1>;
> + };
> +
> + vpu_g2: video-codec@38310000 {
> + compatible = "nxp,imx8mq-vpu-g2";
> + reg = <0x38300000 0x10000>;
> + reg-names "g2";
> + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "g2";
> + clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
> + clock-names = "g2";
> + power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
> };
> --
> 2.32.0
>
>
