On Mon, Nov 29, 2021 at 07:26:30PM +0100, Jernej Skrabec wrote:
> It turns out that imx8m_vpu_g2_irq() doesn't depend on any platform
> specifics and can be used with other G2 platform drivers too.
>
> Move it to common code.
>
> Signed-off-by: Jernej Skrabec <jernej.skrabec@xxxxxxxxx>
Reviewed-by: Ezequiel Garcia <ezequiel@xxxxxxxxxxxxxxxxxxxx>
Thanks!
> ---
> drivers/staging/media/hantro/hantro_g2.c | 18 ++++++++++++++++++
> drivers/staging/media/hantro/hantro_hw.h | 1 +
> drivers/staging/media/hantro/imx8m_vpu_hw.c | 20 +-------------------
> 3 files changed, 20 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/staging/media/hantro/hantro_g2.c b/drivers/staging/media/hantro/hantro_g2.c
> index 6f3e1f797f83..ee5f14c5f8f2 100644
> --- a/drivers/staging/media/hantro/hantro_g2.c
> +++ b/drivers/staging/media/hantro/hantro_g2.c
> @@ -24,3 +24,21 @@ void hantro_g2_check_idle(struct hantro_dev *vpu)
> }
> }
> }
> +
> +irqreturn_t hantro_g2_irq(int irq, void *dev_id)
> +{
> + struct hantro_dev *vpu = dev_id;
> + enum vb2_buffer_state state;
> + u32 status;
> +
> + status = vdpu_read(vpu, G2_REG_INTERRUPT);
> + state = (status & G2_REG_INTERRUPT_DEC_RDY_INT) ?
> + VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
> +
> + vdpu_write(vpu, 0, G2_REG_INTERRUPT);
> + vdpu_write(vpu, G2_REG_CONFIG_DEC_CLK_GATE_E, G2_REG_CONFIG);
> +
> + hantro_irq_done(vpu, state);
> +
> + return IRQ_HANDLED;
> +}
> diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
> index dbe51303724b..c33b1f5df37b 100644
> --- a/drivers/staging/media/hantro/hantro_hw.h
> +++ b/drivers/staging/media/hantro/hantro_hw.h
> @@ -413,5 +413,6 @@ void hantro_g2_vp9_dec_done(struct hantro_ctx *ctx);
> int hantro_vp9_dec_init(struct hantro_ctx *ctx);
> void hantro_vp9_dec_exit(struct hantro_ctx *ctx);
> void hantro_g2_check_idle(struct hantro_dev *vpu);
> +irqreturn_t hantro_g2_irq(int irq, void *dev_id);
>
> #endif /* HANTRO_HW_H_ */
> diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
> index 1a43f6fceef9..f5991b8e553a 100644
> --- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
> +++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
> @@ -191,24 +191,6 @@ static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id)
> return IRQ_HANDLED;
> }
>
> -static irqreturn_t imx8m_vpu_g2_irq(int irq, void *dev_id)
> -{
> - struct hantro_dev *vpu = dev_id;
> - enum vb2_buffer_state state;
> - u32 status;
> -
> - status = vdpu_read(vpu, G2_REG_INTERRUPT);
> - state = (status & G2_REG_INTERRUPT_DEC_RDY_INT) ?
> - VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
> -
> - vdpu_write(vpu, 0, G2_REG_INTERRUPT);
> - vdpu_write(vpu, G2_REG_CONFIG_DEC_CLK_GATE_E, G2_REG_CONFIG);
> -
> - hantro_irq_done(vpu, state);
> -
> - return IRQ_HANDLED;
> -}
> -
> static int imx8mq_vpu_hw_init(struct hantro_dev *vpu)
> {
> vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1];
> @@ -280,7 +262,7 @@ static const struct hantro_irq imx8mq_irqs[] = {
> };
>
> static const struct hantro_irq imx8mq_g2_irqs[] = {
> - { "g2", imx8m_vpu_g2_irq },
> + { "g2", hantro_g2_irq },
> };
>
> static const char * const imx8mq_clk_names[] = { "g1", "g2", "bus" };
> --
> 2.34.1
>
