On Tue, Jun 15, 2021 at 03:12:59PM +0200, Sergio Paracuellos wrote: > On Tue, Jun 15, 2021 at 3:09 PM Thomas Bogendoerfer > <tsbogend@xxxxxxxxxxxxxxxx> wrote: > > > > On Mon, Jun 14, 2021 at 12:06:15PM +0200, Sergio Paracuellos wrote: > > > PCI_IOBASE is used to create VM maps for PCI I/O ports, it is > > > required by generic PCI drivers to make memory mapped I/O range > > > work. Hence define it for ralink architectures to be able to > > > avoid parsing manually IO ranges in PCI generic driver code. > > > Function 'plat_mem_setup' for ralink is using 'set_io_port_base' > > > call using '0xa0000000' as address, so use the same address in > > > the definition to align things. > > > > > > Signed-off-by: Sergio Paracuellos <sergio.paracuellos@xxxxxxxxx> > > > --- > > > arch/mips/include/asm/mach-ralink/spaces.h | 10 ++++++++++ > > > 1 file changed, 10 insertions(+) > > > create mode 100644 arch/mips/include/asm/mach-ralink/spaces.h > > > > > > diff --git a/arch/mips/include/asm/mach-ralink/spaces.h b/arch/mips/include/asm/mach-ralink/spaces.h > > > new file mode 100644 > > > index 000000000000..87d085c9ad61 > > > --- /dev/null > > > +++ b/arch/mips/include/asm/mach-ralink/spaces.h > > > @@ -0,0 +1,10 @@ > > > +/* SPDX-License-Identifier: GPL-2.0 */ > > > +#ifndef __ASM_MACH_RALINK_SPACES_H_ > > > +#define __ASM_MACH_RALINK_SPACES_H_ > > > + > > > +#define PCI_IOBASE _AC(0xa0000000, UL) > > > +#define PCI_IOSIZE SZ_16M > > > +#define IO_SPACE_LIMIT (PCI_IOSIZE - 1) > > > + > > > +#include <asm/mach-generic/spaces.h> > > > +#endif > > > -- > > > 2.25.1 > > > > Acked-by: Thomas Bogendoerfer <tsbogend@xxxxxxxxxxxxxxxx> > > Fastest response ever :) Thanks! Thanks, all now queued up.
