Patchwork housekeeping for: spi-devel-general

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Latest series: [v3] spi-nand/spi-mem DTR support (2025-01-10T14:45:02)
  Superseding: [v2] spi-nand/spi-mem DTR support (2024-12-24T17:05:45):
    [v2,01/27] spi: spi-mem: Extend spi-mem operations with a per-operation maximum frequency
    [v2,02/27] spi: spi-mem: Add a new controller capability
    [v2,03/27] spi: amd: Support per spi-mem operation frequency switches
    [v2,04/27] spi: amd: Drop redundant check
    [v2,05/27] spi: amlogic-spifc-a1: Support per spi-mem operation frequency switches
    [v2,06/27] spi: cadence-qspi: Support per spi-mem operation frequency switches
    [v2,07/27] spi: dw: Support per spi-mem operation frequency switches
    [v2,08/27] spi: fsl-qspi: Support per spi-mem operation frequency switches
    [v2,09/27] spi: microchip-core-qspi: Support per spi-mem operation frequency switches
    [v2,10/27] spi: mt65xx: Support per spi-mem operation frequency switches
    [v2,11/27] spi: mxic: Support per spi-mem operation frequency switches
    [v2,12/27] spi: nxp-fspi: Support per spi-mem operation frequency switches
    [v2,13/27] spi: rockchip-sfc: Support per spi-mem operation frequency switches
    [v2,14/27] spi: spi-sn-f-ospi: Support per spi-mem operation frequency switches
    [v2,15/27] spi: spi-ti-qspi: Support per spi-mem operation frequency switches
    [v2,16/27] spi: zynq-qspi: Support per spi-mem operation frequency switches
    [v2,17/27] spi: zynqmp-gqspi: Support per spi-mem operation frequency switches
    [v2,18/27] spi: spi-mem: Reorder spi-mem macro assignments
    [v2,19/27] spi: spi-mem: Create macros for DTR operation
    [v2,20/27] spi: spi-mem: Estimate the time taken by operations
    [v2,21/27] mtd: spinand: Create distinct fast and slow read from cache variants
    [v2,22/27] mtd: spinand: Add an optional frequency to read from cache macros
    [v2,23/27] mtd: spinand: Enhance the logic when picking a variant
    [v2,24/27] mtd: spinand: Add support for read DTR operations
    [v2,25/27] mtd: spinand: winbond: Update the *JW chip definitions
    [v2,26/27] mtd: spinand: winbond: Add comment about naming
    [v2,27/27] mtd: spinand: winbond: Add support for DTR operations


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