On 08.12.2024 18:35, Christophe JAILLET wrote: > Le 06/12/2024 à 20:59, Ryan.Wanner@xxxxxxxxxxxxx a écrit : >> From: Ryan Wanner <Ryan.Wanner@xxxxxxxxxxxxx> >> >> Add clock support for SAMA7D65 SoC. >> >> Increase maximum number of valid master clocks. The PMC for the SAMA7D65 >> requires 9 master clocks. >> >> Increase maximum amount of PLLs to 9 to support SAMA7D65 SoC PLL >> requirements. >> >> Signed-off-by: Ryan Wanner <Ryan.Wanner@xxxxxxxxxxxxx> > > ... > >> + for (i = 0; i < ARRAY_SIZE(sama7d65_gck); i++) { >> + u8 num_parents = 4 + sama7d65_gck[i].pp_count; >> + struct clk_hw *tmp_parent_hws[8]; >> + u32 *mux_table; >> + >> + mux_table = kmalloc_array(num_parents, sizeof(*mux_table), >> + GFP_KERNEL); >> + if (!mux_table) >> + goto err_free; >> + >> + PMC_INIT_TABLE(mux_table, 4); >> + PMC_FILL_TABLE(&mux_table[4], sama7d65_gck[i].pp_mux_table, >> + sama7d65_gck[i].pp_count); >> + for (j = 0; j < sama7d65_gck[i].pp_count; j++) { >> + u8 pll_id = sama7d65_gck[i].pp[j].pll_id; >> + u8 pll_compid = sama7d65_gck[i].pp[j].pll_compid; >> + >> + tmp_parent_hws[j] = sama7d65_plls[pll_id][pll_compid].hw; >> + } >> + PMC_FILL_TABLE(&parent_hws[4], tmp_parent_hws, >> + sama7d65_gck[i].pp_count); >> + >> + hw = at91_clk_register_generated(regmap, &pmc_pcr_lock, >> + &sama7d65_pcr_layout, >> + sama7d65_gck[i].n, NULL, >> + parent_hws, mux_table, >> + num_parents, >> + sama7d65_gck[i].id, >> + &sama7d65_gck[i].r, >> + sama7d65_gck[i].pp_chg_id); >> + if (IS_ERR(hw)) > > If we fail here, mux_table is not freed, because it is not stored yet in > alloc_mem. You're right! I missed that.