On 10/30/24 8:52 PM, Han Xu wrote: > Hi Miquel, Hi! > > I met the similar problem when working on the Micron MT35XU01GBBA SPI NOR chip. > The chip can work at 166MHz in SDR mode but 200MHz in DDR mode. I found Read ID > failed on some platforms when using 200MHz as maximum frequency, so I have to > lower the maximum frequency with some performance loss. > > I think the patch is useful but the SPI NOR doesn't have such vendor-specific > predefined SPI_MEM_OPS like SPI NAND. Do you have any suggestion on how to handle > this case? Thanks. Why can't we add similar predefined SPI_MEM_OPS in SPI NOR? Cheers, ta