Re: [PATCH v3 02/10] dt-bindings: iio: dac: axi-dac: add ad3552r axi variant

[Nuno Sá <noname.nuno@xxxxxxxxx>]

On Mon, 2024-09-30 at 14:52 +0200, Angelo Dureghello wrote:
> On 29.09.2024 11:46, Jonathan Cameron wrote:
> > On Thu, 19 Sep 2024 11:19:58 +0200
> > Angelo Dureghello <adureghello@xxxxxxxxxxxx> wrote:
> > 
> > > From: Angelo Dureghello <adureghello@xxxxxxxxxxxx>
> > > 
> > > Add a new compatible and related bindigns for the fpga-based
> > > "ad3552r" AXI IP core, a variant of the generic AXI DAC IP.
> > > 
> > > The AXI "ad3552r" IP is a very similar HDL (fpga) variant of the
> > > generic AXI "DAC" IP, intended to control ad3552r and similar chips,
> > > mainly to reach high speed transfer rates using an additional QSPI
> > 
> > I'd drop the word additional as I assume it is an 'either/or' situation
> > for the interfaces.
> > 
> > Do we have other devices using this same IP?  I.e. does it make
> > sense to provide a more generic compatible as a fallback for this one
> > so that other devices would work without the need for explicit support?
> > 
> > 
> no, actually ad3552r-axi is only interfacing to ad3552r.
> I could eventually set adi,axi-dac-9.1.b as a fallback, since it
> is the "gneric" AXI implementation.

Yes but the generic IP does not have this spi bus implementation so the device
would be unusable (unless I'm missing something)

- Nuno Sá