Hi Jon, On Sat, Aug 24, 2024 at 12:57:02PM +0800, Jon Lin wrote: > Fix WARN_ON: > [ 22.869352][ T1885] clk_spi0 already unprepared > [ 22.869379][ T1885] WARNING: CPU: 3 PID: 1885 at drivers/clk/clk.c:813 clk_core_unprepare+0xbc4 > [ 22.869380][ T1885] Modules linked in: bcmdhd dhd_static_buf > [ 22.869391][ T1885] CPU: 3 PID: 1885 Comm: Binder:355_2 Tainted: G W 5.10.66 #59 > [ 22.869393][ T1885] Hardware name: Rockchip RK3588 EVB1 LP4 V10 Board (DT) > [ 22.869397][ T1885] pstate: 60400009 (nZCv daif +PAN -UAO -TCO BTYPE=--) > [ 22.869401][ T1885] pc : clk_core_unprepare+0xbc/0x214 > [ 22.869404][ T1885] lr : clk_core_unprepare+0xbc/0x214 > > Fixes: ("spi: rockchip: Suspend and resume the bus during NOIRQ_SYSTEM_SLEEP_PM ops") Thanks for the patch. However, the fixes tag should include the 12 characters of SHA-1 ID. the corrected Fixes tag should be: Fixes: e882575efc77 ("spi: rockchip: Suspend and resume the bus during NOIRQ_SYSTEM_SLEEP_PM ops") Regards, Kuan-Wei > Signed-off-by: Jon Lin <jon.lin@xxxxxxxxxxxxxx> > --- > > drivers/spi/spi-rockchip.c | 57 +++++++++++++++++--------------------- > 1 file changed, 26 insertions(+), 31 deletions(-) > > diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c > index e1ecd96c7858..043a7739c330 100644 > --- a/drivers/spi/spi-rockchip.c > +++ b/drivers/spi/spi-rockchip.c > @@ -940,33 +940,24 @@ static void rockchip_spi_remove(struct platform_device *pdev) > spi_controller_put(ctlr); > } > > -#ifdef CONFIG_PM_SLEEP > -static int rockchip_spi_suspend(struct device *dev) > +#ifdef CONFIG_PM > +static int rockchip_spi_runtime_suspend(struct device *dev) > { > - int ret; > struct spi_controller *ctlr = dev_get_drvdata(dev); > struct rockchip_spi *rs = spi_controller_get_devdata(ctlr); > > - ret = spi_controller_suspend(ctlr); > - if (ret < 0) > - return ret; > - > clk_disable_unprepare(rs->spiclk); > clk_disable_unprepare(rs->apb_pclk); > > - pinctrl_pm_select_sleep_state(dev); > - > return 0; > } > > -static int rockchip_spi_resume(struct device *dev) > +static int rockchip_spi_runtime_resume(struct device *dev) > { > int ret; > struct spi_controller *ctlr = dev_get_drvdata(dev); > struct rockchip_spi *rs = spi_controller_get_devdata(ctlr); > > - pinctrl_pm_select_default_state(dev); > - > ret = clk_prepare_enable(rs->apb_pclk); > if (ret < 0) > return ret; > @@ -975,41 +966,45 @@ static int rockchip_spi_resume(struct device *dev) > if (ret < 0) > clk_disable_unprepare(rs->apb_pclk); > > - ret = spi_controller_resume(ctlr); > - if (ret < 0) { > - clk_disable_unprepare(rs->spiclk); > - clk_disable_unprepare(rs->apb_pclk); > - } > - > return 0; > } > -#endif /* CONFIG_PM_SLEEP */ > +#endif /* CONFIG_PM */ > > -#ifdef CONFIG_PM > -static int rockchip_spi_runtime_suspend(struct device *dev) > +#ifdef CONFIG_PM_SLEEP > +static int rockchip_spi_suspend(struct device *dev) > { > + int ret; > struct spi_controller *ctlr = dev_get_drvdata(dev); > - struct rockchip_spi *rs = spi_controller_get_devdata(ctlr); > > - clk_disable_unprepare(rs->spiclk); > - clk_disable_unprepare(rs->apb_pclk); > + ret = spi_controller_suspend(ctlr); > + if (ret < 0) > + return ret; > + > + /* Avoid redundant clock disable */ > + if (!pm_runtime_status_suspended(dev)) > + rockchip_spi_runtime_suspend(dev); > + > + pinctrl_pm_select_sleep_state(dev); > > return 0; > } > > -static int rockchip_spi_runtime_resume(struct device *dev) > +static int rockchip_spi_resume(struct device *dev) > { > int ret; > struct spi_controller *ctlr = dev_get_drvdata(dev); > - struct rockchip_spi *rs = spi_controller_get_devdata(ctlr); > > - ret = clk_prepare_enable(rs->apb_pclk); > - if (ret < 0) > - return ret; > + pinctrl_pm_select_default_state(dev); > > - ret = clk_prepare_enable(rs->spiclk); > + if (!pm_runtime_status_suspended(dev)) { > + ret = rockchip_spi_runtime_resume(dev); > + if (ret < 0) > + return ret; > + } > + > + ret = spi_controller_resume(ctlr); > if (ret < 0) > - clk_disable_unprepare(rs->apb_pclk); > + rockchip_spi_runtime_suspend(dev); > > return 0; > } > -- > 2.34.1 > >