Hey Mark, Got some fixes here for the spi-microchip-core driver, that I am passing on.. The author of the first patch is no longer at Microchip, so there's probably gonna be some bounces on the series. The remainder of the patches got sent in by a user, and, other than one patch, I just wrote commit messages for those that were missing them and rebased the series on top of mainline. There was one other patch in the series submitted by the user to us, that I opted to drop, adding locking around accesses to tx FIFO in the interrupt handler and in the transfer_one implementation. I think that patch is not needed after the first patch in this series since there'll be no contention any more. Cheers, Conor. CC: Steve Wilkins <steve.wilkins@xxxxxxxxxxxxx> CC: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> CC: Daire McNamara <daire.mcnamara@xxxxxxxxxxxxx> CC: Mark Brown <broonie@xxxxxxxxxx> CC: linux-spi@xxxxxxxxxxxxxxx CC: linux-kernel@xxxxxxxxxxxxxxx Naga Sureshkumar Relli (1): spi: microchip-core: fix the issues in the isr Steve Wilkins (5): spi: microchip-core: defer asserting chip select until just before write to TX FIFO spi: microchip-core: only disable SPI controller when register value change requires it spi: microchip-core: fix init function not setting the master and motorola modes spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer spi: microchip-core: add support for word sizes of 1 to 32 bits drivers/spi/spi-microchip-core.c | 190 ++++++++++++++++++------------- 1 file changed, 110 insertions(+), 80 deletions(-) -- 2.43.2