On Tue, May 14, 2024 at 11:45:06AM +0100, Prajna Rajendra Kumar wrote:
> The PolarFire SoC SPI "hard" controller supports eight CS lines, out of
> which only one CS line is physically wired. The default value of
> 'num-cs' was never set and it did not didn't impose a maximum value.
>
> To reflect this hardware limitation in the device tree, the binding
> enforces that the 'num-cs' property cannot exceed 1 unless additional
> CS lines are explicitly defined using GPIO descriptors.
>
> Fixes: 2da187304e55 ("spi: add bindings for microchip mpfs spi")
> Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@xxxxxxxxxxxxx>
> ---
> .../bindings/spi/microchip,mpfs-spi.yaml | 29 +++++++++++++++++--
> 1 file changed, 26 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
> index 74a817cc7d94..ffa8d1b48f8b 100644
> --- a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
> +++ b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
> @@ -13,9 +13,6 @@ description:
> maintainers:
> - Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
>
> -allOf:
> - - $ref: spi-controller.yaml#
> -
> properties:
> compatible:
> oneOf:
> @@ -43,6 +40,32 @@ required:
> - interrupts
> - clocks
>
> +allOf:
> + - $ref: spi-controller.yaml#
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: microchip,mpfs-spi
> + then:
> + properties:
> + num-cs:
> + default: 1
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: microchip,mpfs-spi
> + not:
> + required:
> + - cs-gpios
> + then:
> + properties:
> + num-cs:
> + maximum: 1
So, it turns out that "maximum" here should actually be 2, as there's a
CS routed via the FPGA fabric as well. I think default should become 2
also. I can show you what we missed in the configurator on Monday, or
Cyril can if you see him before then.
Cheers,
Conor.
Attachment:
signature.asc
Description: PGP signature
