On Sun, Jun 02, 2024 at 05:31:10PM +0200, Szőke Benjamin wrote: > As i understand "axi_quad_spi@a00a0000" can be mapped via udev to a custom > symlink name but in a new adaptive SoC HWs like AMD ZynqMP, Intel Stratix, > Microchip PolarFire Soc etc. it is not possible and not good solution > because this axi reg address can be different and become to > non-deterministic in day to next when there is a new PL FW update for their > FPGA part in the silicon. > What udev rules have to use for it if you say it can be perfectly done via > udev and "axi_quad_spi@a00a0000" cannot be used for making this rule? This feels like something I'd expect the FPGA tools to help with, having to run around adding random properties to individual bindings to figure out what the IPs that the tooling has decided to instantiate doesn't seem scalable. > > > DT binding would need to be documented later in a separated patch as a > > > guideline mentioned it in Linux repo. > > No, that needs to happen along with the code change. > The official documentation says totally different: > "The Documentation/ and include/dt-bindings/ portion of the patch should be > a separate patch. ..." In the same series. We can document bindings without code but we don't take code without bindings. > https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/submitting-patches.rst > By the way where can i find .yml or .txt dt-bindings documentation of spidev driver? The binding documentation describes the hardware, spidev is an implementation detail of Linux so should not have a binding. A bunch of the devices should be in the trivial bindings document.
Attachment:
signature.asc
Description: PGP signature
