This patch series is adding support for additional Marvell HW overlay build on top of Cadence xSPI IP It includes: - Clock and PHY configuration - ACPI support - Additional MRVL HW overlay to support tranfer operations Piyush Malgujar (1): driver: spi: cadence: Add ACPI support Witold Sadowski (4): spi: cadence: Add new bindings documentation for Cadence XSPI spi: cadence: Add Marvell IP modification changes spi: cadence: Force single modebyte cadence-xspi: Add xfer capabilities .../devicetree/bindings/spi/cdns,xspi.yaml | 84 ++- drivers/spi/spi-cadence-xspi.c | 675 +++++++++++++++++- 2 files changed, 738 insertions(+), 21 deletions(-) -- 2.17.1