Re: [PATCH 1/2] spi: intel-pci: Remove Meteor Lake-S SoC PCI ID from the list

[Mark Brown <broonie@xxxxxxxxxx>]

On Mon, 22 Jan 2024 14:00:33 +0200, Mika Westerberg wrote:
> Turns out this "SoC" side controller does not support certain commands,
> such as reading chip JEDEC ID, so the controller is pretty much unusable
> in Linux. We should be using the "PCH" side controller instead. For this
> reason remove this PCI ID from the list.
> 
> 

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/2] spi: intel-pci: Remove Meteor Lake-S SoC PCI ID from the list
      commit: 6c314425b9ef6b247cefd0903e287eb072580c3b
[2/2] spi: intel-pci: Add support for Arrow Lake SPI serial flash
      commit: 8afe3c7fcaf72fca1e7d3dab16a5b7f4201ece17

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark