Hey folks, this set of patches fixes two bugs in the sun6i SPI driver that result in corruption of received data in DMA RX mode. The first bug seems to be related to an incompatibility of the SPI RX FIFO with wider than single byte read accesses during SPI transfers. I'm not sure if this bug affects all types of SPI controllers found in Allwinner SoCs supported by this driver. However reducing the access width should always be safe. I've tested this change on a V3s SoC. Further testing to narrow down the set of affected SoCs in the future would be welcome. The second bug is a race between SPI RX DMA and FIFO drain logic for interrupt-based SPI operation. This bug affects all SPI controllers supported by this driver. Once again this change has been tested on the Allwinner V3s SoC. Tobias Schramm (2): spi: sun6i: reduce DMA RX transfer width to single byte spi: sun6i: fix race between DMA RX transfer completion and RX FIFO drain drivers/spi/spi-sun6i.c | 31 +++++++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) -- 2.42.0