On Sat, Jul 15, 2023 at 4:04 AM Fabrizio Castro <fabrizio.castro.jz@xxxxxxxxxxx> wrote: > > Register CLKSEL hosts the configuration for both clock polarity > and data phase, and both values can be set in one write operation. > > Squash the clock polarity and data phase register writes into > one statement, for efficiency. ... > /* Setup clock polarity and phase timing */ > - rzv2m_csi_reg_write_bit(csi, CSI_CLKSEL, CSI_CLKSEL_CKP, > - !(spi->mode & SPI_CPOL)); > - rzv2m_csi_reg_write_bit(csi, CSI_CLKSEL, CSI_CLKSEL_DAP, > - !(spi->mode & SPI_CPHA)); > + rzv2m_csi_reg_write_bit(csi, CSI_CLKSEL, CSI_CLKSEL_MODE, > + ~spi->mode & SPI_MODE_X_MASK); I think this now regresses due to the absence of parentheses. -- With Best Regards, Andy Shevchenko