Re: [PATCH v14 8/8] soc: amd: Add support for AMD Pensando SoC Controller
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- Subject: Re: [PATCH v14 8/8] soc: amd: Add support for AMD Pensando SoC Controller
- From: Brad Larson <blarson@xxxxxxx>
- Date: Tue, 23 May 2023 15:11:32 -0700
- Cc: <adrian.hunter@xxxxxxxxx>, <alcooperx@xxxxxxxxx>, <andy.shevchenko@xxxxxxxxx>, <blarson@xxxxxxx>, <brendan.higgins@xxxxxxxxx>, <briannorris@xxxxxxxxxxxx>, <broonie@xxxxxxxxxx>, <catalin.marinas@xxxxxxx>, <conor+dt@xxxxxxxxxx>, <davidgow@xxxxxxxxxx>, <devicetree@xxxxxxxxxxxxxxx>, <fancer.lancer@xxxxxxxxx>, <gerg@xxxxxxxxxxxxxx>, <gsomlo@xxxxxxxxx>, <hal.feng@xxxxxxxxxxxxxxxx>, <hasegawa-hitomi@xxxxxxxxxxx>, <j.neuschaefer@xxxxxxx>, <joel@xxxxxxxxx>, <kernel@xxxxxxxx>, <krzk@xxxxxxxxxx>, <krzysztof.kozlowski+dt@xxxxxxxxxx>, <lee.jones@xxxxxxxxxx>, <lee@xxxxxxxxxx>, <linux-arm-kernel@xxxxxxxxxxxxxxxxxxx>, <linux-kernel@xxxxxxxxxxxxxxx>, <linux-mmc@xxxxxxxxxxxxxxx>, <linux-spi@xxxxxxxxxxxxxxx>, <p.zabel@xxxxxxxxxxxxxx>, <rdunlap@xxxxxxxxxxxxx>, <robh+dt@xxxxxxxxxx>, <samuel@xxxxxxxxxxxx>, <skhan@xxxxxxxxxxxxxxxxxxx>, <suravee.suthikulpanit@xxxxxxx>, <thomas.lendacky@xxxxxxx>, <tonyhuang.sunplus@xxxxxxxxx>, <ulf.hansson@xxxxxxxxxx>, <vaishnav.a@xxxxxx>, <walker.chen@xxxxxxxxxxxxxxxx>, <will@xxxxxxxxxx>, <zhuyinbo@xxxxxxxxxxx>
- In-reply-to: <bc5118f2-8982-46ff-bc75-d0c71475e909@app.fastmail.com>
- References: <bc5118f2-8982-46ff-bc75-d0c71475e909@app.fastmail.com>
Hi Arnd,
> On Mon, May 15, 2023, at 20:16, Brad Larson wrote:
>> The Pensando SoC controller is a SPI connected companion device
>> that is present in all Pensando SoC board designs. The essential
>> board management registers are accessed on chip select 0 with
>> board mgmt IO support accessed using additional chip selects.
>>
>> Signed-off-by: Brad Larson <blarson@xxxxxxx>
>
> Hi Brad,
>
> I'm sorry I wasn't paying enough attention to this driver as the
> past 13 revisions went by.
>
No worries, bit of a saga. See explanation below.
>> v10 changes:
>> - Different driver implementation specific to this Pensando controller device.
>> - Moved to soc/amd directory under new name based on guidance. This driver is
>> of no use to any design other than all Pensando SoC based cards.
>> - Removed use of builtin_driver, can be built as a module.
>
> it looks like this was a fundamental change that I failed to see.
See explanation below.
>> +# SPDX-License-Identifier: GPL-2.0-only
>> +menu "AMD Pensando SoC drivers"
>> +
>> +config AMD_PENSANDO_CTRL
>> + tristate "AMD Pensando SoC Controller"
>> + depends on SPI_MASTER=y
>> + depends on (ARCH_PENSANDO && OF) || COMPILE_TEST
>> + default ARCH_PENSANDO
>> + select REGMAP_SPI
>> + select MFD_SYSCON
>> + help
>> + Enables AMD Pensando SoC controller device support. This is a SPI
>> + attached companion device in all Pensando SoC board designs which
>> + provides essential board control/status registers and management IO
>> + support.
>
> So generally speaking, I don't want custom user interfaces in
> drivers/soc. It looks like this one has internal interfaces for
> a reset controller and the regmap, so those parts are fine, but
> I'm confused about the purpose of the ioctl interface:
>
>> +static long
>> +penctrl_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
>> +{
>
>> + if (num_msgs > 1) {
>> + msg++;
>> + if (msg->len > PENCTRL_MAX_MSG_LEN) {
>> + ret = -EINVAL;
>> + goto out_unlock;
>> + }
>> + t[1].rx_buf = rx_buf;
>> + t[1].len = msg->len;
>> + }
>> + spi_message_init_with_transfers(&m, t, num_msgs);
>
> This seems to be just a passthrough of user space messages, which
> is what the spidev driver already provides, but using a different
> ioctl interface. I don't really want any user-level interfaces
> in drivers/soc as a rule, but having one that duplicates existing
> functionality seems particularly wrong.
>
> Can you explain what the purpose is? Is this about serializing
> access between the in-kernel reset control and the user-side
> access?
>
> Also, can you explain why this needs a low-lever user interface
> in the first place, rather than something that can be expressed
> using high-level abstractions as you already do with the reset
> control?
>
> All of the above should be part of the changelog text to get a
> driver like this merged. I don't think we can get a quick
> solution here though, so maybe you can start by removing the
> ioctl side and having the rest of the driver in drivers/reset?
In the original patchset I added a pensando compatible to spidev and that
was nacked in review and reusing some random compatible that made it into
spidev was just wrong. Further it was recommended this should be a system
specific driver and don't rely on a debug driver like spidev. I changed
over to a platform specific driver and at that time I also needed to include
a reset controller (emmc reset only). I put these in drivers/mfd and
drivers/reset. Review of the device tree for this approach went back and
forth to _not_ have four child nodes on the spi device each with the same
compatible. Decision was to squash the child nodes into the parent and put
the reset-controller there also. One driver and since its pensando
specific its currently in drivers/soc/amd.
There are five different user processes and some utilities that access the
functionality in the cpld/fpga. You're correct, its passing messages that
are specific to the IP accessed via chip-select. No Elba system will boot
without this driver providing ioctl access.
Regards,
Brad
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