On 26/04/2023 14.25, Mark Brown wrote: > On Wed, Apr 26, 2023 at 09:19:29AM +0200, Rasmus Villemoes wrote: > >> I did consider that approach, but rejected it because it wouldn't work >> with mixing native and gpio chip selects. Say, somebody uses SS0 >> natively, but then also have four additional gpios. Then chipselect 4 >> would end up activating both the SS0 pin as well as the gpio, selecting >> both devices. > >> I don't know if that's really a realistic scenario. But at least I think >> the driver should then somehow have a way to indicate to the core that >> one should either use native or gpio chip selects, but not a mix. > > I'm not sure this is sensible, it'll be a fairly rare situation and we > don't want to preclude using the built in chip select functionality for > some of the chip selects. In a situation like this we only need to have > a single chip select to be managed as a GPIO rather than all of them, > which I'd expect to end up handled in the DT by not allocating that chip > select number. Sorry, I don't understand what you're saying. What exactly is not sensible? And what is "a situation like this"? I described a problem with what is now 87c614175bbf in linux-next: If one has five spi devices, the first four of which use the four native chip selects, there is no way to use a gpio for the fifth, because whichever "channel" you choose in the CHANNEL_SELECT field will cause the ecspi IP block to drive some SSx pin low, while the spi core is also driving the gpio low, so two different devices would be selected. It's not exactly a regression, because any chip_select >= 4 never actually worked, but what I'm saying is that 87c614175bbf also isn't a complete fix if one wants to support mixing native and gpio chip selects. For that, one really needs the unused_native_cs to be used for all gpio chip selects; in particular, one needs some unused native cs to exist. IOW, what my series tries to do. [OK, now that I re-read what I wrote, I didn't exactly describe "four native CS, one gpio", but "one native CS, four gpios". That scenario _could_ of course work with my series, but with 87c614175bbf just masking the chip-select number, we do get the problem that two devices would be selected at the same time. And I don't think expecting the DT author to know to use regs 1, 2, 3, 5 for those four gpio chip selects is reasonable; nor do I think it would actually work, since the missing gpio phandle at index 4 in cs-gpios would be treated by the spi core as a "that device, if any, uses native chip select 4", and that would/should fail.] Rasmus