On Fri, Apr 14, 2023 at 12:05:19PM +0000, Joy Chakraborty wrote: > Store address width capabilities of DMA controller during init and check > the same per transfer to make sure the bits/word requirement can be met. > > Current DW DMA driver requires both tx and rx channel to be configured > and functional hence a subset of both tx and rx channel address width > capability is checked with the width requirement(n_bytes) for a > transfer. ... > + /* > + * Assuming both channels belong to the same DMA controller hence the > + * address width capabilities most likely would be the same. I would add something to explain the side of these address width, like * Assuming both channels belong to the same DMA controller hence * the peripheral side address width capabilities most likely would * be the same. > + */ -- With Best Regards, Andy Shevchenko