There are 4 qspi data pins: data0, data1, data2, and data3. Currently we have a shared pin state for data0 and data1 (2 lane config) and a pin state for data2 and data3 (you'd enable both this and the 2 lane state for 4 lanes). The second state is obviously misnamed. Fix it. Fixes: e1ce853932b7 ("arm64: dts: qcom: sdm845: Add qspi (quad SPI) node") Signed-off-by: Douglas Anderson <dianders@xxxxxxxxxxxx> --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 479859bd8ab3..aafc7cc7edd8 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2763,7 +2763,7 @@ qspi_data01: qspi-data01-state { function = "qspi_data"; }; - qspi_data12: qspi-data12-state { + qspi_data23: qspi-data23-state { pins = "gpio93", "gpio94"; function = "qspi_data"; }; -- 2.40.0.348.gf938b09366-goog