RE: [PATCH V5 09/15] spi: Add stacked and parallel memories support in SPI core

["Mahapatra, Amit Kumar" <amit.kumar-mahapatra@xxxxxxx>]

> -----Original Message-----
> From: Tudor Ambarus <tudor.ambarus@xxxxxxxxxx>
> Sent: Tuesday, March 7, 2023 9:51 AM
> To: Mahapatra, Amit Kumar <amit.kumar-mahapatra@xxxxxxx>;
> broonie@xxxxxxxxxx; miquel.raynal@xxxxxxxxxxx; richard@xxxxxx;
> vigneshr@xxxxxx; jic23@xxxxxxxxxx; pratyush@xxxxxxxxxx
> Cc: linux-spi@xxxxxxxxxxxxxxx; linux-mtd@xxxxxxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx
> Subject: Re: [PATCH V5 09/15] spi: Add stacked and parallel memories
> support in SPI core
> 
> There were too many recipients in To and Cc and I couldn't reply to the
> email. I whipped off the Cc filed and most of the people from To and added
> the lists in Cc.
> 
> On 3/6/23 17:21, Amit Kumar Mahapatra wrote:	
> > Multi CS support using GPIO is not tested due to unavailability of
> > necessary hardware setup.
> 
> Please don't add code that is not used or tested.

During our discussion on the RFC, Mark had suggested to add multi-cs support 
via GPIO as well. We had agreed to add multi-cs support via GPIO, but had also 
mentioned that we don't have a hardware setup to test the CS GPIO use case.
https://lore.kernel.org/linux-arm-kernel/BN7PR12MB2802E2A9079E505932832270DC979@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/

Regards,
Amit

> 
> Cheers,
> ta