On 01/06/2023 02:07 PM, Mark Brown wrote:
As far as I can see, only spi mem op has such pattern but agree it is possible that other device can generate such usage. I can add a check for this condition(all the prepend data must use same io width) so error can be printed and user can switch to dummy cs workaround.On Fri, Jan 06, 2023 at 12:08:06PM -0800, William Zhang wrote:In general the controller supports SPI dual mode operation but the particular SPI flash dual io read op switches from single mode in cmd phase to dual mode in address and data phase. This is not compatible with prepend operation where cmd and address are sent out through the prepend buffer and they must use same the number of io pins. This patch disables these SPI flash dual io read ops through the mem_ops supports_op interface when prepend mode is used. This makes sure the SPI flash driver selects the compatible read ops at run time.This suggests that your prepend mode is attempting to combine incompatible transfers doesn't it? Presumably other devices could generate similar access patterns...
Thank you for your feedbacks so far and have a nice weekend!
Attachment:
smime.p7s
Description: S/MIME Cryptographic Signature
